The invention relates to a semiconductor device having a silicon layer of a first conductivity type, which is disposed on a dielectric substrate and in which at least two zones of a semiconductor circuit element of a second opposite conductivity type and a contact zone having the same conductivity type as, but a higher doping concentration than the silicon layer are provided, which zones adjoin at least substantially the surface of the silicon layer.
The invention further relates to a method of manufacturing such a semiconductor device.
Such a semiconductor device of the SOI (Silicon On Insulator) type has, in comparison with semiconductor devices having a semiconductor circuit element provided in a silicon substrate many advantages. A few of these advantages are the lower radiation sensitivity, a higher speed and a higher packing density (especially in three dimensional integrated circuits).
The semiconductor circuit element may be of many different types, such as, for example, a bipolar transistor, a thyristor and a field effect transistor. In all these types of semiconductor circuit elements, the invention can advantageously be used. However, the invention more particularly relates to a semiconductor device comprising as the semiconductor circuit element a field effect transistor, whose source and drain zones are the zones of the second conductivity type. The invention will therefore be described hereinafter mainly with reference to a semiconductor device comprising a field effect transistor as the semiconductor circuit element.
A Prior Art semiconductor device of the general kind mentioned above in which the semiconductor circuit element comprises a field effect transistor, is known from Japanese Kokai No. 57-27069. In the semiconductor device described therein, the substrate consists of sapphire, on which a p-doped monocrystalline silicon later is disposed. n.sup.+ doped source and drain zones of the field effect transistor are located in the silicon layer. In a region arranged laterally of the drain zone, the silicon layer has throughout its thickness a higher doping concentration than at the remaining areas. This region constitutes the contact zone, by means of which the silicon layer can be contacted at the surface.
By means of the contact zone, the silicon layer can be applied to a fixed potential. If a given fixed voltage is also applied to a gate electrode of the field effect transistor, there is a fixed potential difference between the gate electrode and the silicon layer. A given switching condition of the transistor is associated with this potential difference. When now the silicon layer is held at a fixed potential, the switching condition only depends upon the voltage applied to the gate electrode.
In the known semiconductor device described, a parasitic channel can be formed at an interface of the silicon layer and the substrate. This channel is obtained due to attraction of minority charge carriers from the silicon layer to the substrate. Especially in the case of a substrate of silicon oxide and a p-doped silicon layer disposed thereon, this phenomenon can occur. At the interface between the silicon oxide substrate and the silicon layer, a transitional region with regard to both crystal structure and stoichiometry from amorphous silicon oxide to crystalline silicon is present. In this region, a fixed positive charge can be formed in the silicon oxide. Due to this positive charge, electrons are attracted from the p-type silicon layer to the substrate, as a result of which a channel of electrons shortcircuiting the n-type zones of the semiconductor circuit element is formed in the silicon layer. However, also in the case of an n-doped silicon layer or in other crystal structures of the silicon, such a formation of a parasitic channel may occur, for example under the influence of conductors which are located below the semiconductor region and which have a different potential from that of the silicon layer, as a result of which holes or electrons are attracted from the silicon layer to the substrate. Due to the advancing integration and the reduction of semiconductor devices associated therewith, this channel formation gives rise to an increasingly more serious problem because it seriously affects adversely the operation of the semiconductor circuit element.
Furthermore, in a Prior Art semiconductor device of the kind mentioned above, a further problem can arise when the semiconductor circuit element comprises a field effect transistor. During operation of the transistor, in fact a potential is applied to a gate electrode of the transistor. As a result, a region in the silicon layer below the electrode becomes depleted. The size of this depleted region depends upon the voltage applied to the gate electrode and upon the doping concentration of the silicon layer. At a higher absolute value of the voltage, this region is generally larger. On the contrary, at a higher doping concentration, the depleted region can extend only over a smaller distance. With the integration on an increasingly larger scale of semiconductor circuit elements in semiconductor devices and the reduction associated therewith of the transistors themselves, the dimensions in the semiconductor device are meanwhile so small and especially the silicon layer has become so thin that it is possible for the depleted region to extend as far as the substrate. Due to the presence of the fixed positive charge in the transitional region or due to the presence of conductor tracks in the substrate, a surface potential at the interface can have a value different from that of the potential of the silicon layer, this surface potential moreover being unknown. If now the depleted region extends as far as this interface, the threshold voltage of the field effect transistor will be influenced by this surface potential, but the extent to which this will be the case is not known beforehand due to the unknown value of the surface potential. As a result, the operation of the transistor is anything but certain. This should of course be avoided.